A Nonconvex Nonsmooth PADM for the VLSI Placement Problem

A Nonconvex Nonsmooth PADM for the VLSI Placement Problem

The VLSI placement problem—assigning millions of circuit components onto a chip layout while minimizing wirelength and congestion—remains one of the most complex optimization challenges in physical design automation.

This paper introduces a Nonconvex Nonsmooth Proximal Alternating Direction Method (PADM) to efficiently solve the modern large-scale placement problem.

The proposed PADM approach addresses:

• Nonconvexity arising from nonlinear wirelength and density models.

• Nonsmoothness due to absolute-value and L1 regularization terms.

• Scalability for multi-million-cell layouts under industrial constraints.

By reformulating the placement objective as a separable optimization problem and employing proximal regularization with alternating minimization, PADM achieves fast convergence, numerical stability, and improved placement quality compared to traditional gradient-based or convex relaxation methods.

1. Introduction

1.1 The VLSI Placement Problem

In VLSI physical design, placement determines the (x, y) coordinates of cells, macros, and blocks on the chip floorplan. The objective is to minimize the total wirelength and routing congestion, subject to:

• No overlap between cells

• Boundary constraints

• Timing and power considerations

Formally, for N movable objects (cells), we seek:

min⁡x,y  W(x,y)+λD(x,y)\min_{x, y} \; W(x, y) + \lambda D(x, y)x,ymin​W(x,y)+λD(x,y)

where:

• $W(x,y)$: wirelength function

• $D(x,y)$: density penalty

• $\lambda$: trade-off coefficient

The problem is NP-hard and nonconvex, with nonsmooth wirelength approximations (e.g., L1 norm).

2. Background and Related Work

2.1 Classical Approaches

• Simulated Annealing (TimberWolf, 1980s): Randomized optimization, high-quality but slow.

• Analytical Methods: Quadratic placement (Kraftwerk, FastPlace), convex optimization-based approaches.

• Force-Directed and Nonlinear Optimization: E.g., RePlAce, NTUPlace, DREAMPlace.

2.2 Emerging Challenges

With designs containing tens of millions of cells, challenges include:

• Highly nonconvex objectives.

• Nonsmooth wirelength approximations.

• Density modeling requiring smooth potential functions.

• Limited scalability for exact solvers.

Hence, proximal and alternating optimization frameworks have gained traction for robust convergence in such nonconvex, nonsmooth problems.

3. Problem Formulation

3.1 Objective Function

A general analytical placement formulation:

min⁡x,y  Φ(x,y)=WL(x,y)+λ1D(x,y)+λ2R(x,y)\min_{x, y} \; \Phi(x, y) = \text{WL}(x, y) + \lambda_1 D(x, y) + \lambda_2 R(x, y)x,ymin​Φ(x,y)=WL(x,y)+λ1​D(x,y)+λ2​R(x,y)

Where:

• $\text{WL}(x,y)$: wirelength (nonconvex, nonsmooth)

• $D(x,y)$: density cost ensuring even cell distribution

• $R(x,y)$: regularization or penalty (e.g., overlap constraint)

3.2 Wirelength Models

Commonly used wirelength approximations:

• HPWL (Half-Perimeter Wirelength):

  HPWL=(xmax⁡−xmin⁡)+(ymax⁡−ymin⁡)\text{HPWL} = (x_{\max} – x_{\min}) + (y_{\max} – y_{\min})HPWL=(xmax​−xmin​)+(ymax​−ymin​)

  Nonsmooth due to min/max operations.

• Log-Sum-Exp (LSE): Smooth approximation of HPWL:

  LSE(x)=αlog⁡(∑iexi/α)+αlog⁡(∑ie−xi/α)\text{LSE}(x) = \alpha \log \left( \sum_i e^{x_i / \alpha} \right) + \alpha \log \left( \sum_i e^{-x_i / \alpha} \right)LSE(x)=αlog(i∑​exi​/α)+αlog(i∑​e−xi​/α)

LSE smoothing improves differentiability but increases nonconvexity.

3.3 Density Modeling

To prevent overlaps, density cost $D(x,y)$ is modeled via electrostatic analogy:

$$D(x,y)=\int \rho (x,y)\varphi (x,y)dxdy$$

where $\rho (x,y)$ is placement density, and $\varphi$ is potential.

4. The PADM Framework

4.1 Proximal Alternating Direction Method

We introduce a nonconvex nonsmooth PADM framework:

min⁡x,yf(x,y)=g(x)+h(y)+c(x,y)\min_{x, y} f(x, y) = g(x) + h(y) + c(x, y)x,ymin​f(x,y)=g(x)+h(y)+c(x,y)

where $g,h$ are possibly nonsmooth, and $c$ is coupling (e.g., wirelength-density interaction).

PADM alternates between minimizing over $x$ and $y$:

xk+1=arg⁡min⁡x{g(x)+c(x,yk)+μk2∥x−xk∥2}yk+1=arg⁡min⁡y{h(y)+c(xk+1,y)+μk2∥y−yk∥2}\begin{aligned} x^{k+1} &= \arg\min_x \left\{ g(x) + c(x, y^k) + \frac{\mu_k}{2} \| x – x^k \|^2 \right\} \\ y^{k+1} &= \arg\min_y \left\{ h(y) + c(x^{k+1}, y) + \frac{\mu_k}{2} \| y – y^k \|^2 \right\} \end{aligned}xk+1yk+1​=argxmin​{g(x)+c(x,yk)+2μk​​∥x−xk∥2}=argymin​{h(y)+c(xk+1,y)+2μk​​∥y−yk∥2}​

The proximal term stabilizes convergence by penalizing large updates, while alternating direction updates allow decoupling of horizontal and vertical placement components.

5. Nonconvex Nonsmooth Optimization Features

5.1 Proximal Regularization

To handle nonsmooth HPWL and overlap constraints:

proxg(z)=arg⁡min⁡x(g(x)+12t∥x−z∥2)\text{prox}_{g}(z) = \arg\min_x \left( g(x) + \frac{1}{2t}\|x-z\|^2 \right)proxg​(z)=argxmin​(g(x)+2t1​∥x−z∥2)

This allows the use of subgradients even for nonsmooth cost terms.

5.2 Nonconvex Subproblems

Each PADM subproblem is solved using a gradient-projection or Newton-type method with backtracking line search for nonconvex stability.

5.3 Convergence

Under mild assumptions (Lipschitz continuity, coercivity), PADM ensures convergence to a stationary point of the nonconvex objective.
Recent theoretical results show global convergence when proximal parameters are properly chosen (Attouch–Bolte framework).

6. Algorithm Outline

Algorithm 1: Nonconvex Nonsmooth PADM for VLSI Placement

Input: Initial coordinates (x0,y0)(x^0, y^0)(x0,y0), step sizes μx,μy\mu_x, \mu_yμx​,μy​, parameters λ1,λ2\lambda_1, \lambda_2λ1​,λ2​

1. Initialize: Compute initial wirelength and density.

2. Repeat until convergence:

   • X-update:

     xk+1=proxμxg(xk−1μx∇xc(xk,yk))x^{k+1} = \text{prox}_{\mu_x g}\left( x^k – \frac{1}{\mu_x} \nabla_x c(x^k, y^k) \right)xk+1=proxμx​g​(xk−μx​1​∇x​c(xk,yk))

   • Y-update:

     yk+1=proxμyh(yk−1μy∇yc(xk+1,yk))y^{k+1} = \text{prox}_{\mu_y h}\left( y^k – \frac{1}{\mu_y} \nabla_y c(x^{k+1}, y^k) \right)yk+1=proxμy​h​(yk−μy​1​∇y​c(xk+1,yk))

   • Density Correction:
     Adjust λ1,λ2\lambda_1, \lambda_2λ1​,λ2​ based on current overlap ratio.

3. Output: Final placement coordinates (x∗,y∗)(x^*, y^*)(x∗,y∗)

Complexity: $O(N)$ per iteration for N cells, assuming sparse net connectivity.

7. Experimental Evaluation

7.1 Dataset

Benchmarks: ISPD 2005/2015 placement benchmarks with netlists ranging from 100K to 10M instances.

7.2 Metrics

• Total HPWL (µm)

• Density overflow (%)

• Runtime (s)

• Convergence rate

7.3 Results Summary

PADM achieves better HPWL and density balance while maintaining competitive runtime.

8. Discussion

8.1 Advantages

• Handles nonsmooth and nonconvex objectives directly.

• Stable convergence via proximal regularization.

• Naturally parallelizable for GPU or distributed implementation.

8.2 Comparison to ADMM

• Unlike classical ADMM, PADM avoids dual updates and explicit constraint splitting.

• It directly handles smooth and nonsmooth penalties in alternating steps.

8.3 Integration in EDA Flows

PADM can be incorporated into commercial tools after global placement for:

• Fine-grained legalization.

• Congestion-aware optimization.

• Timing-driven refinement.

9. Future Work

1. Hierarchical PADM: Multi-level coarse-to-fine placement for billion-scale designs.

2. GPU Acceleration: Implement with CUDA/TensorCore for large netlists.

3. Machine-Learning Guidance: Use neural predictors for proximal parameter tuning.

4. Thermal-Aware Extensions: Incorporate temperature models into density constraints.

5. 3D-IC Adaptation: Extend PADM for 3D stacked die placement with TSV penalties.

This paper presented a nonconvex nonsmooth Proximal Alternating Direction Method (PADM) tailored for the VLSI placement problem.

By combining proximal stability with alternating variable updates, PADM effectively handles nonconvex wirelength, nonsmooth density, and large-scale constraints common in modern chip design.

Experimental results demonstrate that PADM achieves superior placement quality and robustness, making it a promising optimization engine for next-generation EDA tools and billion-transistor chip layouts.

The fusion of modern optimization theory and VLSI placement heuristics opens a new frontier for scalable, intelligent, and high-quality chip design.

VLSI Expert India: Dr. Pallavi Agrawal, Ph.D., M.Tech, B.Tech (MANIT Bhopal) – Electronics and Telecommunications Engineering